snickerdoodle Platform Controller
firmware for STM32F0 platform controller
sd_platform.h
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1 
46 #ifndef __SD_PLATFORM_H
47 #define __SD_PLATFORM_H
48 #ifdef __cplusplus
49 extern "C" {
50 #endif
51 
52 
62 #define CONS_UART_RX_BUFF_SIZE 128
69 #define WL18xx_ANTENNA_SMA ((uint8_t)0x01)
70 #define WL18xx_ANTENNA_CHIP ((uint8_t)0x02)
79 #define BOOT_STACK_ADDR 0x200014A8
80 #define SYS_MEM_START_ADDR 0x1FFFC800
91 #define IS_WL18xx_ANTENNA_MODE(__MODE__) (((__MODE__) == WL18xx_ANTENNA_SMA) || \
92  ((__MODE__) == WL18xx_ANTENNA_CHIP))
93 
94 
101 #define TOGGLE_BIT(__REG__, __BIT__) ((__REG__ & (1 << __BIT__)) ? \
102  (__REG__ & ~(1 << __BIT__)) : \
103  (__REG__ | (1 << __BIT__)))
104 
114 extern struct sd_cbuf uart1_rx_cbuff;
115 extern struct sd_cbuf uart2_rx_cbuff;
117 extern struct sd_doub_buff cons_dbuff;
119 extern uint8_t uart1_rx_buff[CONS_UART_RX_BUFF_SIZE];
120 extern uint8_t uart2_rx_buff[CONS_UART_RX_BUFF_SIZE];
122 extern uint8_t cons_buff[2][CONS_UART_RX_BUFF_SIZE];
124 //extern struct sd_hci_dev wl18xxbt_dev; /**< Bluetooth HCI device layer */
125 
126 extern uint8_t hci_params_buff[CONS_UART_RX_BUFF_SIZE];
145 enum sd_uart_usb_err {
148 };
162 enum sd_zynq_boot {
163  SD_ZYNQ_BOOT_JTAG = 0x00,
164  SD_ZYNQ_BOOT_NAND = 0x01,
165  SD_ZYNQ_BOOT_QSPI = 0x02,
167 };
175 enum sd_boot_button {
176  SD_BOOT_DFU = 0x00,
177  SD_BOOT_QSPI = 0x01,
178  SD_BOOT_JTAG = 0x02,
179  SD_BOOT_DEFAULT = 0x03,
180 };
181 
182 
183 
188 void sd_wl18xx_ant_config (uint8_t ant);
189 void sd_zynq_clk_enable (uint8_t en);
190 void sd_zynq_jtag_enable (uint8_t en);
191 void sd_wl_clk_enable (uint8_t en);
192 void sd_bt_enable (uint8_t en);
193 void sd_zynq_boot_config (enum sd_zynq_boot boot);
194 enum sd_zynq_boot sd_boot_select (void);
197 void sd_dfu_start (void);
198 void sd_zynq_enable (void);
199 void sd_zynq_disable (void);
210 #ifdef __cplusplus
211 }
212 #endif
213 #else
214 #error "Multiple inclusion of sd_platform.h"
215 #endif /* __SD_PLATFORM_H */
216 
217 /*
218  * END OF FILE [sd_platform.h]
219  */
Definition: sd_platform.h:169
Definition: sd_platform.h:168
void sd_wl18xx_ant_config(uint8_t ant)
WL18xx Antenna Configuration Outputs antenna select pins for the wireless module. ...
Definition: sd_platform.c:312
void sd_zynq_boot_config(enum sd_zynq_boot boot)
Zynq Boot Config Outputs boot select pins to zynq for desired boot media source.
Definition: sd_platform.c:177
sd_boot_button
Boot button press state.
Definition: sd_platform.h:166
enum sd_uart_usb_err sd_uart_usb_transmit(struct sd_uart_dev *dev)
UART to USB Bridge Transmission Transmit the buffer that has been recieved on the bridged UART over U...
Definition: sd_platform.c:389
Character buffer structure.
Definition: sd_buffer.h:102
Definition: sd_platform.h:155
void sd_zynq_disable(void)
Disable Zynq Power Disable the Zynq power rails by setting the enable pin low.
Definition: sd_platform.c:239
uint8_t cons_buff[2][CONS_UART_RX_BUFF_SIZE]
Definition: sd_platform.c:86
Definition: sd_platform.h:156
sd_uart_usb_err
UART to USB bridge error enumeration.
Definition: sd_platform.h:136
void sd_dfu_start(void)
Enter Device Firmware Upgrade Mode Prepare device to enter system memory by disabling peripheral cloc...
Definition: sd_platform.c:446
Definition: sd_platform.h:137
Definition: sd_platform.h:170
Double character buffer structure.
Definition: sd_buffer.h:89
UART device structure.
Definition: sd_uart.h:139
struct sd_doub_buff cons_dbuff
Definition: sd_platform.c:81
Definition: sd_platform.h:154
void sd_wl_clk_enable(uint8_t en)
Wireless Clock Enable Enable the wireless module 32kHz clock source.
Definition: sd_platform.c:143
void sd_bt_enable(uint8_t en)
Bluetooth Enable Enable the Bluetooth interface on the wireless module.
Definition: sd_platform.c:159
sd_zynq_boot
Zynq boot pin enumeration.
Definition: sd_platform.h:153
struct sd_cbuf uart2_rx_cbuff
Definition: sd_platform.c:79
enum sd_uart_usb_err sd_uart_usb_bridge_init(void)
UART to USB Bridge Initialization Initialize UART device structure, UART to USB bridge buffer and set...
Definition: sd_platform.c:350
void sd_zynq_clk_enable(uint8_t en)
Zynq Clock Enable Enables the main clock source for the Zynq APU.
Definition: sd_platform.c:110
Definition: sd_platform.h:138
#define CONS_UART_RX_BUFF_SIZE
Definition: sd_platform.h:61
Definition: sd_platform.h:157
struct sd_cbuf uart1_rx_cbuff
Definition: sd_platform.c:78
void sd_zynq_enable(void)
Enable Zynq Power Enable the Zynq power rails by setting the enable pin high.
Definition: sd_platform.c:254
void sd_zynq_jtag_enable(uint8_t en)
Zynq JTAG Enable Enables the JTAG interface for programming the PS or PL.
Definition: sd_platform.c:127
Definition: sd_platform.h:167
uint8_t hci_params_buff[CONS_UART_RX_BUFF_SIZE]
Definition: sd_platform.c:90
uint8_t uart1_rx_buff[CONS_UART_RX_BUFF_SIZE]
Definition: sd_platform.c:83
uint8_t uart2_rx_buff[CONS_UART_RX_BUFF_SIZE]
Definition: sd_platform.c:84
enum sd_zynq_boot sd_boot_select(void)
Boot selection.
Definition: sd_platform.c:523