snickerdoodle Platform Controller
firmware for STM32F0 platform controller
Zynq Boot Configuration

Zynq processing subsystem boot configuration. More...

Functions

void sd_zynq_clk_enable (uint8_t enable)
 Zynq Clock Enable Enables the main clock source for the Zynq APU. More...
 
void sd_zynq_jtag_enable (uint8_t enable)
 Zynq JTAG Enable Enables the JTAG interface for programming the PS or PL. More...
 
void sd_wl_clk_enable (uint8_t enable)
 Wireless Clock Enable Enable the wireless module 32kHz clock source. More...
 
void sd_bt_enable (uint8_t enable)
 Bluetooth Enable Enable the Bluetooth interface on the wireless module. More...
 
void sd_zynq_boot_config (enum sd_zynq_boot boot)
 Zynq Boot Config Outputs boot select pins to zynq for desired boot media source. More...
 
void sd_zynq_reset (void)
 Zynq Reset Reset the Zynq APU. More...
 
void sd_zynq_disable (void)
 Disable Zynq Power Disable the Zynq power rails by setting the enable pin low. More...
 
void sd_zynq_enable (void)
 Enable Zynq Power Enable the Zynq power rails by setting the enable pin high. More...
 

Detailed Description

Zynq processing subsystem boot configuration.

Function Documentation

◆ sd_bt_enable()

void sd_bt_enable ( uint8_t  enable)

#include <Src/sd_platform.c>

Bluetooth Enable Enable the Bluetooth interface on the wireless module.

Parameters
enableState to set for Bluetooth interface
Return values
None
160 {
161  GPIO_PinState en = enable ? GPIO_PIN_SET : GPIO_PIN_RESET;
162 
163  HAL_GPIO_WritePin(WL18xx_BT_EN_GPIO_Port,
164  WL18xx_BT_EN_Pin, en);
165 }

◆ sd_wl_clk_enable()

void sd_wl_clk_enable ( uint8_t  enable)

#include <Src/sd_platform.c>

Wireless Clock Enable Enable the wireless module 32kHz clock source.

Parameters
enableState to set for clock
Return values
None
144 {
145  GPIO_PinState en = enable ? GPIO_PIN_SET : GPIO_PIN_RESET;
146 
147  HAL_GPIO_WritePin(WL_32KHZ_CLK_EN_GPIO_Port,
148  WL_32KHZ_CLK_EN_Pin, en);
149 }

◆ sd_zynq_boot_config()

void sd_zynq_boot_config ( enum sd_zynq_boot  boot)

#include <Src/sd_platform.c>

Zynq Boot Config Outputs boot select pins to zynq for desired boot media source.

Parameters
bootValue defining boot pin outputs
Return values
None
178 {
179  GPIO_PinState mio4_out, mio5_out;
180 
181  switch (boot) {
182  case SD_ZYNQ_BOOT_JTAG:
183  mio4_out = GPIO_PIN_RESET; /* 0 */
184  mio5_out = GPIO_PIN_RESET; /* 0 */
185  break;
186 
187  case SD_ZYNQ_BOOT_NAND:
188  mio4_out = GPIO_PIN_SET; /* 1 */
189  mio5_out = GPIO_PIN_RESET; /* 0 */
190  break;
191 
192  case SD_ZYNQ_BOOT_QSPI:
193  mio4_out = GPIO_PIN_RESET; /* 0 */
194  mio5_out = GPIO_PIN_SET; /* 1 */
195  break;
196 
197  case SD_ZYNQ_BOOT_SD:
198  mio4_out = GPIO_PIN_SET; /* 1 */
199  mio5_out = GPIO_PIN_SET; /* 1 */
200  break;
201  }
202 
203  /* Write boot select pins */
204  HAL_GPIO_WritePin(MIO4_BOOT_SELECT_GPIO_Port,
205  MIO4_BOOT_SELECT_Pin,
206  mio4_out);
207 
208  HAL_GPIO_WritePin(MIO5_BOOT_SELECT_GPIO_Port,
209  MIO5_BOOT_SELECT_Pin,
210  mio5_out);
211 }
Definition: sd_platform.h:155
Definition: sd_platform.h:156
Definition: sd_platform.h:154
Definition: sd_platform.h:157

◆ sd_zynq_clk_enable()

void sd_zynq_clk_enable ( uint8_t  enable)

#include <Src/sd_platform.c>

Zynq Clock Enable Enables the main clock source for the Zynq APU.

Parameters
enableState to set for clock
Return values
None
111 {
112  GPIO_PinState en = enable ? GPIO_PIN_SET : GPIO_PIN_RESET;
113 
114  HAL_GPIO_WritePin(ZYNQ_CLK_EN_GPIO_Port,
115  ZYNQ_CLK_EN_Pin, en);
116 
117 }

◆ sd_zynq_disable()

void sd_zynq_disable ( void  )

#include <Src/sd_platform.c>

Disable Zynq Power Disable the Zynq power rails by setting the enable pin low.

Parameters
buttButton used to trigger this function
Return values
None
240 {
241  HAL_GPIO_WritePin(ZYNQ_POWER_EN_GPIO_Port,
242  ZYNQ_POWER_EN_Pin, GPIO_PIN_RESET);
244 }
enum sd_led_err sd_led_rapid(struct sd_led *led)
LED rapid blinking Set an LED to a continuous rapid blinking.
Definition: sd_led_pattern.c:197
struct sd_led app_led
Definition: sd_led.c:67

◆ sd_zynq_enable()

void sd_zynq_enable ( void  )

#include <Src/sd_platform.c>

Enable Zynq Power Enable the Zynq power rails by setting the enable pin high.

Parameters
buttButton used to trigger this function
Return values
None
255 {
256  HAL_GPIO_WritePin(ZYNQ_POWER_EN_GPIO_Port,
257  ZYNQ_POWER_EN_Pin, GPIO_PIN_SET);
258 
260 }
enum sd_led_err sd_led_reset(struct sd_led *led)
LED reset Reset the LED configuration and clear the pattern.
Definition: sd_led.c:174
struct sd_led app_led
Definition: sd_led.c:67

◆ sd_zynq_jtag_enable()

void sd_zynq_jtag_enable ( uint8_t  enable)

#include <Src/sd_platform.c>

Zynq JTAG Enable Enables the JTAG interface for programming the PS or PL.

Parameters
enableState to set for JTAG interface
Return values
None
128 {
129  GPIO_PinState en = enable ? GPIO_PIN_SET : GPIO_PIN_RESET;
130 
131  HAL_GPIO_WritePin(ZYNQ_JTAG_NRST_GPIO_Port,
132  ZYNQ_JTAG_NRST_Pin, en);
133 }

◆ sd_zynq_reset()

void sd_zynq_reset ( void  )

#include <Src/sd_platform.c>

Zynq Reset Reset the Zynq APU.

Parameters
None
Return values
None
222 {
223  sd_zynq_disable();
224 
225  /* A Short wait */
226  HAL_Delay(100);
227 
228  sd_zynq_enable();
229 }
void sd_zynq_enable(void)
Enable Zynq Power Enable the Zynq power rails by setting the enable pin high.
Definition: sd_platform.c:254
void sd_zynq_disable(void)
Disable Zynq Power Disable the Zynq power rails by setting the enable pin low.
Definition: sd_platform.c:239