TDA998x Video Output

Modules
	Color Conversion Matrix

Functions
static int	tda998x_vidout_enable (struct tda998x_dev *dev, bool en)
	Video Output Enable. More...
static int	tda998x_vidout_set_config (struct tda998x_dev *dev, enum tda998x_sink sink, enum tda998x_vidout_mode vout_mode, enum hvf_cntrl_0_prefil prefil, enum hvf_cntrl_1_yuv_blk yuv_blk, enum hvf_cntrl_1_vqr vqr)
	Set Video Output Configuration. More...
static int	tda998x_vidout_set_sync (struct tda998x_dev *dev, bool h_ext, bool v_ext, bool de_ext, uint8_t tgl, enum tbg_cntrl_0_sync sync)
	Set Video Output Synchronization. More...
static int	tda998x_video_set_inout (struct tda998x_dev *dev, enum tda998x_vid_fmt vin_fmt, enum tda998x_format_3d format_3d, enum tda998x_scaler_mode sca_mod_req, enum tda998x_vid_fmt vout_fmt, uint8_t pix_rpt, enum tda998x_mtx_mode mtx_mode, enum tda998x_dwidth dwidth, enum tda998x_vqr vqr)
static int	tda998x_set_aud_pkt_enable (struct tda998x_dev *dev, bool en)
	Set Audio Clock Packet Recovery.
static int	tda998x_set_pkt_acp (struct tda998x_dev *dev, struct tda998x_pkt *pkt, unsigned int len, uint8_t uAcpType, bool en)
static int	tda998x_PktSetGeneralCntrl (struct tda998x_dev *dev, bool mute, bool en)
static int	tda998x_PktSetIsrc1 (struct tda998x_dev *dev, struct tda998x_pkt *pkt, unsigned int len, bool bIsrcCont, bool bIsrcValid, uint8_t uIsrcStatus, bool en)
static int	tda998x_PktSetIsrc2 (struct tda998x_dev *dev, struct tda998x_pkt *pkt, unsigned int len, bool en)
static int	tda998x_PktSetMpegInfoframe (struct tda998x_dev *dev, struct tda998x_mpeg_pkt *pkt, bool en)
static int	tda998x_pkt_set_null_insert (struct tda998x_dev *dev, bool en)
	Set Null Packet Insertion. More...
static int	tda998x_pkt_set_null (struct tda998x_dev *dev)
static int	tda998x_pkg_set_spdinfo (struct tda998x_dev *dev, struct tda998x_spd_pkt *pkt, bool en)
	Set Source Product Description Infoframe.
static int	tda998x_pkt_set_raw_vid_infoframe (struct tda998x_dev *dev, struct tda998x_pkt *pkt, bool en)
static int	tda998x_pkt_set_vs_infoframe (struct tda998x_dev *dev, struct tda998x_pkt *pkt, unsigned int len, uint8_t version, bool en)
static int	tda998x_set_pix_edge (struct tda998x_dev *dev, enum vip_cntrl_3_edge edge)
static int	input_config (struct tda998x_dev *dev, enum tda998x_vidin_mode vin_mode, enum vip_cntrl_3_edge edge, enum tda998x_pix_rate pix_rate, enum tda998x_upsample upsample_mode, uint8_t pix_rpt, enum tda998x_vid_fmt vout_fmt, enum tda998x_format_3d format_3d)
	Configure Video Input. More...
static int	tda998x_reset (struct tda998x_dev *dev)
int	tda998x_init (struct tda998x_dev *dev, struct tda998x_cfg *cfg)
int	tda998x_set_input_output (struct tda998x_dev *dev, struct tda998x_vidin_cfg *vidin_cfg, struct tda998x_vidout_cfg *vidout_cfg, struct tda998x_audin_cfg *audin_cfg, enum tda998x_sink sink)
	Set Input and Output. More...
static int	tda998x_aud_set_pkt_infoframe (struct tda998x_dev *dev, struct tda998x_aud_if_pkt *pkt, bool en)
	Set Audio Infoframe Packet. More...

Detailed Description

Function Documentation

input_config()

static int input_config ( struct tda998x_dev *  dev, enum tda998x_vidin_mode  vin_mode, enum vip_cntrl_3_edge  edge, enum tda998x_pix_rate  pix_rate, enum tda998x_upsample  upsample_mode, uint8_t  pix_rpt, enum tda998x_vid_fmt  vout_fmt, enum tda998x_format_3d  format_3d  )

static

#include <projects/lib/tda998x.c>

Configure Video Input.

Parameters

dev	TDA998x device structure pointer

Returns

0 on success, non-zero error status otherwise

{
    int ret = 0;
    uint8_t reg_idx, reg_idx3D; /* Video format value used for register */
    uint8_t ssd = 0;        /* Packed srl, scg and de */
    struct tda998x_vidin_cfg *vidin_cfg;
    const struct vidfmt_desc *desc;

    /* Check parameters */
    if (dev == NULL)
        return ERR_NULL_PARAM;

    desc = get_vidfmt_desc(vout_fmt);
    if (desc == NULL)
        return ERR_NOT_FOUND;

    ret = write_reg_mask(dev,
            VIP_CNTRL_3,
            VIP_CNTRL_3_EDGE,
            (uint8_t) edge);
    if (ret < 0)
        return ret;

    vidin_cfg->pix_rate = pix_rate;

    switch (vidin_cfg->mode) {
    case VINMODE_RGB444:
    case VINMODE_YUV444:
        if ((vidin_cfg->pix_rate == PIXRATE_SINGLE) ||
                (vidin_cfg->pix_rate == PIXRATE_SINGLE_REPEATED)) {
            ret = write_reg_mask(dev, VIP_CNTRL_4, VIP_CNTRL_4_CCIR656, 0);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, HVF_CNTRL_1, HVF_CNTRL_1_SEMI_PLANAR, 0);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, PLL_SERIAL_3, PLL_SERIAL_3_SRL_CCIR, 0);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, SEL_CLK, SEL_CLK_SEL_VRF_CLK_MASK, 0);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, VIP_CNTRL_4, VIP_CNTRL_4_656_ALT, 0);
            if (ret < 0)
                return ret;
        } else {
            return ERR_BAD_PARAM;
        }
        break;

    case VINMODE_YUV422:
        if ((vidin_cfg->pix_rate == PIXRATE_SINGLE) ||
                (vidin_cfg->pix_rate == PIXRATE_SINGLE_REPEATED)) {
            ret = write_reg_mask(dev, VIP_CNTRL_4, VIP_CNTRL_4_CCIR656, 0);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, HVF_CNTRL_1, HVF_CNTRL_1_SEMI_PLANAR, HVF_CNTRL_1_SEMI_PLANAR);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, PLL_SERIAL_3, PLL_SERIAL_3_SRL_CCIR, 0);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, SEL_CLK, SEL_CLK_SEL_VRF_CLK_MASK, 0);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, VIP_CNTRL_4, VIP_CNTRL_4_656_ALT, 0);
            if (ret < 0)
                return ret;
        } else {
            return ERR_BAD_PARAM;
        }
        break;

    case VINMODE_CCIR656:
        if ((vidin_cfg->pix_rate == PIXRATE_SINGLE) ||
                (vidin_cfg->pix_rate == PIXRATE_SINGLE_REPEATED)) {
            ret = write_reg_mask(dev, VIP_CNTRL_4, VIP_CNTRL_4_CCIR656, VIP_CNTRL_4_CCIR656);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, HVF_CNTRL_1, HVF_CNTRL_1_SEMI_PLANAR, HVF_CNTRL_1_SEMI_PLANAR);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, PLL_SERIAL_3, PLL_SERIAL_3_SRL_CCIR, PLL_SERIAL_3_SRL_CCIR);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, SEL_CLK, SEL_CLK_SEL_VRF_CLK_MASK, 0x02);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev,
                    VIP_CNTRL_4,
                    VIP_CNTRL_4_656_ALT,
                    0);
            if (ret < 0)
                return ret;
        } else if (vidin_cfg->pix_rate == PIXRATE_DOUBLE) {
            ret = write_reg_mask(dev, VIP_CNTRL_4, VIP_CNTRL_4_CCIR656, VIP_CNTRL_4_CCIR656);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, HVF_CNTRL_1, HVF_CNTRL_1_SEMI_PLANAR, HVF_CNTRL_1_SEMI_PLANAR);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, PLL_SERIAL_3, PLL_SERIAL_3_SRL_CCIR, 0);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, SEL_CLK, SEL_CLK_SEL_VRF_CLK_MASK, 0);
            if (ret < 0)
                return ret;

            ret = write_reg_mask(dev, VIP_CNTRL_4, VIP_CNTRL_4_656_ALT, VIP_CNTRL_4_656_ALT);
            if (ret < 0)
                return ret;
        }
        break;

    default:
        ret = write_reg_mask(dev, VIP_CNTRL_4, VIP_CNTRL_4_CCIR656, 0);
        if (ret < 0)
            return ret;

        ret = write_reg_mask(dev, HVF_CNTRL_1, HVF_CNTRL_1_SEMI_PLANAR, 0);
        if (ret < 0)
            return ret;

        ret = write_reg_mask(dev, PLL_SERIAL_3, PLL_SERIAL_3_SRL_CCIR, 0);
        if (ret < 0)
            return ret;

        ret = write_reg_mask(dev, SEL_CLK, SEL_CLK_SEL_VRF_CLK_MASK, 0);
        if (ret < 0)
            return ret;

        break;
    }

    ret = write_reg_mask(dev,
            PLL_SERIAL_2,
            PLL_SERIAL_2_SRL_NOSC_MASK,
            desc->pll_sc);

    /* Set pixel repetition */
    ret = write_reg_mask(dev,
            PLL_SERIAL_2,
            PLL_SERIAL_2_SRL_PR_MASK,
            desc->pix_rpt);
    if (ret < 0)
        return ret;

    /* Set pixel repetition count for repeater module */
    ret = write_reg(dev, RPT_CNTRL, desc->pix_rpt);
    if (ret < 0)
        return ret;

    ret = write_reg_mask(dev,
            PLL_SERIAL_1,
            PLL_SERIAL_1_SRL_MAN_IZ,
            0);
    if (ret < 0)
        return ret;

    ret = write_reg_mask(dev,
            PLL_SERIAL_3,
            PLL_SERIAL_3_SRL_DE,
            0);
    if (ret < 0)
        return ret;

    ret = write_reg(dev, SERIALIZER, 0);
    if (ret < 0)
        return ret;

tda998x_aud_set_pkt_infoframe()

static int tda998x_aud_set_pkt_infoframe ( struct tda998x_dev *  dev, struct tda998x_aud_if_pkt *  pkt, bool  en  )

static

#include <projects/lib/tda998x.c>

Set Audio Infoframe Packet.

Parameters

dev	TDA998x device structure pointer
pkt	Audio infoframe packet structure pointer
en	Enable infoframe insertion

Returns

0 on success, non-zero error status otherwise

{
    int ret;
    uint8_t buf[9];         /* Temp buffer to hold header/packet bytes */
    uint16_t buf_reg;       /* Base register used for writing InfoFrame */
    uint16_t flag_reg;      /* Flag register to be used */
    uint8_t flag_mask;      /* Mask used for writing flag register */
  
    if (dev->sink != SINK_HDMI)
        return ERR_NOT_PERMITTED;
    
    buf_reg = IF4_HB0;
    flag_reg = DIP_IF_FLAGS;
    flag_mask = DIP_IF_FLAGS_IF4;
 
//  if (pkt != Null) {
        /* Data to change, start by clearing AIF packet insertion flag */
        ret = write_reg_mask(dev, flag_reg, flag_mask, 0);
        if (ret < 0)
            return ret;
 
        /* Prepare AIF header */
        buf[0] = 0x84;      /* Audio InfoFrame */
        buf[1] = 0x01;      /* Version 1 [HDMI 1.2] */
        buf[2] = 0x0A;      /* Length [HDMI 1.2] */
 
        /* Prepare AIF packet (byte numbers offset by 3) */
        buf[3] = 0;     /* Preset checksum to zero */
    
        buf[4] = ((pkt->type & 0x0F) << 4) |
                (pkt->nchan & 0x07);    /* CT3-0, CC2-0 */
    
        buf[5] = ((pkt->samp_freq & 0x07) << 2) |
                (pkt->samp_size & 0x03);    /* SF2-0, SS1-0 */
    
        buf[6] = 0;         /* [HDMI 1.2] */
        buf[7] = pkt->chan_alloc;   /* CA7-0 */
        buf[8] = ((pkt->lvl_shift & 0x0F) << 3);    /* LS3-0 */
    
        if (pkt->dmix_inhib)
            buf[8] |= (1 << 7);
 
        /* Calculate checksum - this is worked out on "Length" bytes of the
         * packet, the checksum (which we've preset to zero), and the three
         * header bytes.  We exclude bytes PB6 to PB10 (which we
         * are not writing) since they are zero.
         */
        buf[3] = chksum(&buf[0], 9);
    
 
        /* Write header and packet bytes in one operation */
        ret = tda998x_write(dev, buf_reg, 9, &buf[0]);
        if (ret < 0)
            return ret;
//  }
 
    /* Write AIF packet insertion flag */
    ret = write_reg_mask(dev,
            flag_reg,
            flag_mask,
            (uint8_t) en);

tda998x_pkt_set_null_insert()

static int tda998x_pkt_set_null_insert ( struct tda998x_dev *  dev, bool  en  )

static

#include <projects/lib/tda998x.c>

Set Null Packet Insertion.

Parameters

dev	TDA998x device structure pointer
en	Set or clear null packet insertion

Returns

0 on success, non-zero error status otherwise

{
    int ret;
    if (dev->sink != SINK_HDMI)
        return ERR_NOT_PERMITTED;
 
    /* Set or clear FORCE_NULL packet insertion flag */
    ret = write_reg_mask(dev,
            DIP_FLAGS,
            DIP_FLAGS_FORCE_NULL,
            en ? DIP_FLAGS_FORCE_NULL : 0);
    if (ret < 0)
        return ret;

tda998x_set_input_output()

int tda998x_set_input_output	(	struct tda998x_dev *	dev,
		struct tda998x_vidin_cfg *	vidin_cfg,
		struct tda998x_vidout_cfg *	vidout_cfg,
		struct tda998x_audin_cfg *	audin_cfg,
		enum tda998x_sink	sink
	)

#include <projects/lib/tda998x.c>

Set Input and Output.

Parameters

dev	TDA998x device structure pointer
vidin_cfg	Video input configuration structure pointer
vidout_cfg	Video output configuration structure pointer
audin_cfg	Audio input configuration structure pointer

Returns

0 on success, non-zero error status otherwise

< Pixel repetition






< Data path bit width





< Pixel sampling edge




< Sync method



< Toggling


< Subpacket synchronization

< Blanking source

Todo:

BEGIN VIDO INPUT SYNCHRONIZATION

{
    int ret;
    uint8_t pix_rpt;                
    enum tda998x_dwidth dwidth;         
    enum vip_cntrl_3_edge pix_edge;         
    enum tbg_cntrl_0_sync_mthd sync_mthd;       
    enum tda998x_pix_tgl toggle;            
    uint8_t sync;                   
    enum vip_cntrl_3_sp_sync sp_sync;       
    enum vip_cntrl_4_blnkit blankit;        
    uint16_t ref_pix;
    uint16_t ref_line;
    const struct vidfmt_desc *desc;

    const enum vip_cntrl_swap *swap = NULL;
    const enum vip_cntrl_mirr *mirr = NULL;

//  if (sink == SINK_EDID) {
//      /* Change sink type with the currently defined in EDID */
//      ret = tda998x_edid_get_sinktype(dev, &sinktype);
//      if (ret < 0)
//          return ret;
//  }

    desc = get_vidfmt_desc(vidout_cfg->format);
    if (desc == NULL)
        return ERR_NOT_FOUND;

    /* Pixel repetition for DVI not allowed */
    if (sink == SINK_DVI) {
        if (((vidout_cfg->format >= VFMT_06_720x480i_60Hz) && (vidout_cfg->format <= VFMT_15_1440x480p_60Hz)) ||
                ((vidout_cfg->format >= VFMT_21_720x576i_50Hz) && (vidout_cfg->format <= VFMT_30_1440x576p_50Hz)) ||
                ((vidout_cfg->format >= VFMT_35_2880x480p_60Hz)&& (vidout_cfg->format <= VFMT_38_2880x576p_50Hz)))
            return ERR_BAD_PARAM;
    }

    /* Set the TMDS outputs to a forced state */
    ret = tda998x_set_tmds_output(dev, TMDSOUT_FORCED0);
    if (ret < 0)
        return ret;

    dev->vin_cfg = vidin_cfg;
    dev->vout_cfg = vidout_cfg;

    /* Set video output configuration */
    ret = tda998x_vidout_set_config(dev, sink, vidout_cfg->mode, PREFIL_OFF, YUVBLK_16, QRANGE_FS);
    if (ret < 0)
        return ret;

    /* Default config */
    pix_rpt = PIXREP_DEFAULT;
    dwidth = VOUT_DBITS_12;
    pix_edge = PIXEDGE_CLK_POS;
    sync_mthd = SYNCMTHD_V_XDE;
    toggle = PIXTOGL_ENABLE;

    /* Set sync details */
    if (vidin_cfg->sync_src == SYNCSRC_EMBEDDED) {
        sync = 1;                   /* Embedded sync */
        sp_sync = SPSYNC_HEMB;
        blankit = BLNKSRC_VS_HEMB_VEMB;
        sync_mthd = SYNCMTHD_V_XDE;
    } else {
        sync = 0;               /* External sync */

        /* DE is available */
        sp_sync = SPSYNC_RISING_DE;
        blankit = BLNKSRC_NOT_DE;
    }

    /* Port swap table */
    switch(vidin_cfg->mode) {
//  case VINMODE_CCIR656:
//      dwidth = VOUT_DBITS_8;
//      pix_edge = PIXEDGE_CLK_NEG;
//      swap = port_map_ccir656;
//      mirr = mirr_map_ccir656;
//      break;

    case VINMODE_RGB444:
        swap = port_map_rgb444;
        mirr = mirr_map_rgb444;
        break;

//  case VINMODE_YUV444:
//      swap = port_map_yuv444;
//      mirr = mirr_map_yuv444;
//      break;

//  case VINMODE_YUV422:
//      swap = port_map_yuv422;
//      mirr = mirr_map_yuv422;
//      break;

    default:
        return ERR_BAD_PARAM;
    }

    /* Set the audio and video input port configuration */
    ret = tda998x_vidin_set_port_enable(dev);
    if (ret < 0)
        return ret;

    ret = tda998x_vidin_set_mapping(dev, swap, mirr);
    if (ret < 0)
        return ret;

    ret = tda998x_vidin_set_fine(dev, sp_sync, 0, TGLCLK_HIGH);
    if (ret < 0)
        return ret;

    /* Set input blanking */
    ret = tda998x_vidin_set_blanking(dev, blankit, BLNKCODE_RGB444);
    if (ret < 0)
        return ret;

    ret = tda998x_vidin_set_config(dev,
            vidin_cfg->mode,
            vidout_cfg->format,
            vidin_cfg->format_3d,
            pix_edge,
            vidin_cfg->pix_rate,
            UPSAMPLE_AUTO);
    if (ret < 0)
        return ret;

    /* Set input output */
    ret = tda998x_video_set_inout(dev,
            vidin_cfg->format,
            vidin_cfg->format_3d,
            SCALER_MODE_AUTO,
            vidout_cfg->format,
            0,
            MTX_MODE_AUTO,
            dwidth,
            vidout_cfg->vqr);
    if (ret < 0)
        return ret;

    /* Only set audio for HDMI, not DVI */
    if (sink == SINK_HDMI) {
        /* Set audio parameters */
        ret = tda998x_aud_set_input(dev, audin_cfg);
        if (ret < 0)
            return ret;
    }

    if (sync == 0) {
        /* External synchronization */
        switch (vidin_cfg->format) {
        case VFMT_04_1280x720p_60Hz:
        case VFMT_19_1280x720p_50Hz:
        case VFMT_05_1920x1080i_60Hz:
        case VFMT_20_1920x1080i_50Hz:
            if ((vidout_cfg->format == VFMT_16_1920x1080p_60Hz) ||
                    (vidout_cfg->format == VFMT_31_1920x1080p_50Hz)) {
                toggle = PIXTOGL_NO_ACTION;
            }
            break;
        default:
            toggle = PIXTOGL_ENABLE;
            break;
        }
    }

    ret = write_reg_mask(dev,
            VIP_CNTRL_3,
            VIP_CNTRL_3_EMB,
            (uint8_t) vidin_cfg->sync_src);
    if (ret < 0)
        return ret;

    ret = write_reg_mask(dev,
            TBG_CNTRL_0,
            TBG_CNTRL_0_SYNC_MTHD,
            (uint8_t) sync_mthd);
    if (ret < 0)
        return ret;

    /* Toggle DE */
    ret = write_reg_mask(dev,
            VIP_CNTRL_3,
            VIP_CNTRL_3_V_TGL | VIP_CNTRL_3_H_TGL | VIP_CNTRL_3_X_TGL,
            VIP_CNTRL_3_X_TGL);
    if (ret < 0)
        return ret;

    if (desc->reg_fmt >= VIDFORMAT_800x600p_60Hz) {
        set_video_config(dev, &vidformat_pc[desc->reg_fmt - VIDFORMAT_800x600p_60Hz]);
    }

    ref_pix = desc->hfp + 2;
    ref_line = desc->vfp;

    if ((ref_pix >= REFPIX_MIN) &&
            (ref_pix <= REFPIX_MAX)) {
        ret = write_reg16(dev, REFPIX_MSB, ref_pix);
        if (ret < 0)
            return ret;
    }

    if ((ref_line >= REFLINE_MIN) &&
            (ref_line <= REFLINE_MAX)) {
        ret = write_reg16(dev, REFLINE_MSB, ref_line);
        if (ret < 0)
            return ret;
    }

//  ret = tda998x_vidin_set_sync(dev,
//              vidin_cfg->sync_src,
//              sync_mthd,
//              false,
//              false,
//              true,
//              ref_pix,
//              ref_line);
//  if (ret < 0)
//      return ret;

//  toggle = HDMITX_PIXTOGL_ENABLE;
//  ref_pix = 0;
//  ref_line = 0;
//  sync_mthd = 0;

        /* Not found so assume non-scaler and auto-configure input */
//  ret = tda998x_vidin_set_sync_auto(dev,
//              vidin_cfg->sync_src,
//              vidin_cfg->format,
//              vidin_cfg->mode,
//              vidin_cfg->format_3d);
//  if (ret < 0)
//      return ret;

    /* Set infoframes for HDMI only */
//  if (sink == SINK_HDMI) {
//      /* Set infoframe */
//      ret = tda998x_vidout_set_infofram(dev, vidout_cfg->format, vidout_cfg->mode);
//      if (ret < 0)
//          return ret;
//  }

    /* Set video synchronization */
    ret = tda998x_vidout_set_sync(dev,
            VS_SRC_INTERNAL,
            VS_SRC_INTERNAL,
            VS_SRC_INTERNAL,
            VS_TGL_TABLE,
            SYNC_EACH_FRAME);
    if (ret < 0)

tda998x_vidout_enable()

static int tda998x_vidout_enable ( struct tda998x_dev *  dev, bool  en  )

static

#include <projects/lib/tda998x.c>

Video Output Enable.

Parameters

dev	TDA998x device structure pointer
en	Enable video selection

Returns

0 on success, non-zero error status otherwise

{
    int ret;

    ret = write_reg_mask(dev,
            TBG_CNTRL_0,
            TBG_CNTRL_0_FRAME_DIS,
            en ? 0 : TBG_CNTRL_0_FRAME_DIS);
    if (ret < 0)
        return ret;

    return 0;
}

tda998x_vidout_set_config()

static int tda998x_vidout_set_config ( struct tda998x_dev *  dev, enum tda998x_sink  sink, enum tda998x_vidout_mode  vout_mode, enum hvf_cntrl_0_prefil  prefil, enum hvf_cntrl_1_yuv_blk  yuv_blk, enum hvf_cntrl_1_vqr  vqr  )

static

#include <projects/lib/tda998x.c>

Set Video Output Configuration.

Parameters

dev	TDA998x device structure pointer
sink	Video output sink type
vout_mode	Video output mode
prefil	Prefilter
yuv_blk
vqr	Video quantization range

Returns

0 on success, non-zero error status otherwise

{
    int ret;

    if (dev == NULL)
        return ERR_NULL_PARAM;

    if (sink == SINK_EDID) {
        if (dev->edid->state == EDID_NOT_READ)
            dev->sink = SINK_DVI;       /* Assume simplest sink */
        else
            dev->sink = dev->edid->sink;    /* Set sink to the type that was read */
    } else {
        /* Set demanded sink type */
        dev->sink = sink;
    }
 
    if (dev->sink == SINK_DVI) {
        ret = write_reg_mask(dev,
                AIP_CNTRL_0,
                AIP_CNTRL_0_RST_FIFO,
                AIP_CNTRL_0_RST_FIFO);
        if (ret < 0)
            return ret;

        vout_mode = VOUTMODE_RGB444;
 
        ret = write_reg_mask(dev, TBG_CNTRL_1, TBG_CNTRL_1_DWIN_DIS, TBG_CNTRL_1_DWIN_DIS);
        if (ret < 0)
            return ret;

        ret = write_reg_mask(dev, OTP_TX33, OTP_TX33_HDMI, 0);
        if (ret < 0)
            return ret;

        ret = write_reg_mask(dev, ENC_CNTRL, ENC_CNTRL_CTL_CODE_MASK, 0);
        if (ret < 0)
            return ret;
    } else {
        ret = write_reg_mask(dev, AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO, 0);
        if (ret < 0)
            return ret;

        ret = write_reg_mask(dev, TBG_CNTRL_1, TBG_CNTRL_1_DWIN_DIS, 0);
        if (ret < 0)
            return ret;

        ret = write_reg_mask(dev, ENC_CNTRL, ENC_CNTRL_CTL_CODE_MASK, 0x04U);
        if (ret < 0)
            return ret;

        ret = write_reg_mask(dev, OTP_TX33, OTP_TX33_HDMI, OTP_TX33_HDMI);
        if (ret < 0)
            return ret;
    }

    dev->vout_cfg->mode = vout_mode;

    ret = write_reg_mask(dev,
            HVF_CNTRL_0,
            HVF_CNTRL_0_PREFIL_MASK,
            (uint8_t) prefil);
    if (ret < 0)
        return ret;

    ret = write_reg_mask(dev,
            HVF_CNTRL_1,
            HVF_CNTRL_1_YUVBLK,
            (uint8_t) yuv_blk);
    if (ret < 0)
        return ret;

    return 0;
}

tda998x_vidout_set_sync()

static int tda998x_vidout_set_sync ( struct tda998x_dev *  dev, bool  h_ext, bool  v_ext, bool  de_ext, uint8_t  tgl, enum tbg_cntrl_0_sync  sync  )

static

#include <projects/lib/tda998x.c>

Set Video Output Synchronization.

Parameters

dev	TDA998x device structure pointer

Returns

0 on success, non-zero error status otherwise

{
    int ret;
    uint8_t reg_val = 0;
 
    /* Build register value */
    if (h_ext)
        reg_val |= TBG_CNTRL_1_VHX_EXT_HS;

    if (v_ext)
        reg_val |= TBG_CNTRL_1_VHX_EXT_VS;

    if (de_ext)
        reg_val |= TBG_CNTRL_1_VHX_EXT_DE;

    ret = write_reg_mask (dev,
            TBG_CNTRL_1,
            TBG_CNTRL_1_VHX_EXT_MASK,
            reg_val);
    if (ret < 0)
        return ret;
 
    ret = write_reg_mask(dev,
            TBG_CNTRL_1,
            TBG_CNTRL_1_VH_TGL_MASK,
            tgl);

    if (ret < 0)
        return ret;
  
    /* Must be last register set */
    ret = write_reg_mask(dev,
            TBG_CNTRL_0,
            TBG_CNTRL_0_SYNC,
            (uint8_t) sync);
    if (ret < 0)
        return ret;

    /* Toggle TMDS serializer */
    ret = write_reg_mask(dev,
            BUFFER_OUT,
            BUFFER_OUT_SRL_FORCE_MASK,
            (uint8_t) TMDSOUT_FORCED0);
    if (ret < 0)
        return ret;

    ret = write_reg_mask(dev,
            BUFFER_OUT,
            BUFFER_OUT_SRL_FORCE_MASK,
            (uint8_t) TMDSOUT_NORMAL);
    if (ret < 0)
        return ret;
 
    if (sync == SYNC_ONCE) {
        /* Toggle output Sync Once flag for settings to take effect */
        ret = write_reg_mask(dev,
                TBG_CNTRL_0,
                TBG_CNTRL_0_SYNC,
                (uint8_t) SYNC_EACH_FRAME);
        if (ret < 0)
            return ret;

        ret = write_reg_mask(dev,
                TBG_CNTRL_0,
                TBG_CNTRL_0_SYNC,
                (uint8_t) SYNC_ONCE);
        if (ret < 0)
            return ret;
    }